Thanks for the Memory

After puttering off and on with my relay computer design over the last several years, and scrapping two major revisions, I’m finally at the point where the design is 98% frozen. Controls have been identified, dimensions documented, instruction set semi-frozen and internal timing coded. The challenge is that you have no idea how the machine will eventually be used. Unlike a toaster oven where your bases are covered with a thermostat and a power switch, this computer must be flexible enough to handle a variety of different tasks, yet have the necessary controls and features to allow simple, straightforward use. About all that can be done is to simulate such varied use as though the computer did exist, writing programs and working through different interaction scenarios to make sure my bases are covered.

Interestingly, the machine will have two different memory systems. A high-speed solid state memory of 4096 words (4k) and an electromechanical relay-based system originally targeted to be 128 words. And herein lies the rub.

A ‘word’ (or byte in today’s parlance) is 8-bits. The ‘straightforward’ method of design requires 8 relays to store the 8 bits, plus 8 relays (or two, 4-pole relays) to act as switches to gate the word onto/off of the data bus. Additionally, you need a relay to ‘reset’ the word when it’s loading data from the bus. Total: 11 relays x 128 words = 1408 relays.

Due to size limitations of where the memory will be placed in the machine, I only have enough room for 96 words. Still a lot of relays, but I actually have them all on hand. Recently I developed a new method of storage and addressing using bi-stable latching relays and some clever diode logic. The advantages far outweigh the disadvantages- consider this:

Pros:

Only 8 relays required per word vs 11, and no 4-pole relays required. That’s a 30% reduction.

Power consumption is ZERO vs 30 Amps with full memory!

Retains its data even when power is off.

Can be read and written to simultaneously with separate busses should the computer support it.

Reduced footprint means 128 words in square area of 96.

Cons:

Approx $1 a piece in quantity; I have none.

I already have the necessary parts for the std mem design.

So yeah, the latter is a more elegant design, but because I’m sick and tired of spending money, I suppose the original shall have to do.